Digital Stress Share (DSS®)

DSS is a combination of a master/slave current sharing with a quasi-democratic average current determination.  The master/slave architecture ensures tight line and load regulation, while the average current reference for each phase is a result of the current reading from each phase (democratic).  This active phase current balance provides asymmetric current sharing to help eliminate “hot spots” and the devices participating in DSS gain knowledge of the highest and lowest stressed device and adjust control to match the average system stress.  With its temperature corrected phase current sharing, and inter-controller phase add/drop, DSS helps to improve efficiency, simplify thermal management, improve reliability, and provide a higher level of redundancy.

A variety of parameters relating to DSS can be configured through manufacturer-specific PMBus™ commands. Details regarding the DSS implementation, configuration, and recommendations regarding paralleling of power stages are covered in AN-04 and AN-03.

The digital stress share bus is a proprietary single-wire digital communication bus for the interconnection of multiple paralleled digital control ICs.